Intel i8255 PIO Programming Tutorial: Extracts
-------------------------------------------------------------------------------
Note: Another good Q&A Tutorial on the Intel 82C55 can be obtained
by an individual personal license from the Intel website at:
http://developer.intel.com/design/periphrl/overview/7190.HTM
This information thanks to Gerald Coe <gerry@see-sig.co.uk>. But!:
It cannot be included here because of individual license restriction,
but anyone can obtain it at that URL for their personal use. I have
no grasp of why they would not make this free for any public non-
commercial use, but if Intel looks here, they can email me as to why!
I don't bother with idiots/companies who pull such stupid shit!
-------------------------------------------------------------------------------
From: Thomas Scherrer's Web Site at:
http://cybernet.dk/users/tscherrer/z8/Z80_Home.htm & z8/8255pro.htm file.
------------------------------------------------------------
8255 PIO
_________________________________________________________________
24 BIT DIGITAL I/O PIO DETAILS
PROGRAMMING INFORMATION
The 8255 I/O PIO occupies (4) consecutive 8 bit I/O locations starting
at BASE+0 and going to BASE+3.
The structure of the addressing is as follows:
* BASE+0 = Port A (read or write)
* BASE+1 = Port B (read or write)
* BASE+2 = Port C (read or write)
* BASE+3 = Control Register (write only)
The following is an overview of each of the three available modes:
MODE 0 (Basic Input/Output):
* (2) Eight bit ports and (2) 4 bit ports
* Any port can be either input or output
* Outputs are latched
* Inputs are not latched
* (16) different Input/Output configurations are possible in this
mode
MODE 1 (Strobed Input/Output):
* (2) Groups (Group A and Group B)
* Each group contains one 8 bit data port and (1) 4 bit control/data
port
* The 8 bit data port can be either input or output
* Both inputs and outputs are latched
* The 4 bit port is used for control and status of the 8 bit data
port
MODE 2 ( Strobed Bi-directional Bus I/O):
* Used in Group A only
* One 8 bit bi-directional bus port (Port A) and one 5 bit control
port (Port C)
* Both inputs and outputs are latched
* The 5 bit control port (Port C) is used for control and status for
the 8 bit, bi-directional bus port (Port A)
_________________________________________________________________
CONTROL WORD to define operation mode: (This word is written to
base+3)
D7 = 1 Designation of mode set flag
D6 D5 Mode selection of Group A
0 0 = mode 0
0 1 = mode 1
1 x = mode 2
D4 Input/Output selection of Port A
0 = Output
1 = Input
D3 Input/Output selection of high order 4 bits of Port C
0 = Output
1 = Input
D2 Mode selection of Group B
0 = mode 0
1 = mode 1
D1 Input/Output selection of Port B
0 = Output
1 = Input
D0 Input/Output selection of low order 4 bits of Port C
0 = Output
1 = Input
_________________________________________________________________
CONTROL WORD to set and reset bits in In/Out Port C (This word is
written to base+3)
D7 = 0 Bit set/reset flag 0 = Active.
D6 D5 D4 Don't care.
D3 D2 D1 Bit selection
0 0 0 PC0
0 0 1 PC1
0 1 0 PC2
0 1 1 PC3
1 0 0 PC4
1 0 1 PC5
1 1 0 PC6
1 1 1 PC7
D0 Bit set/reset selection
0 = Reset
1 = Set
_______________________________________________________________________
8255 PIO Pin Description:
_________ _________
_| \__/ |_
PA3 |_|1 40|_| PA4
_| |_
PA2 |_|2 39|_| PA5
_| |_
PA1 |_|3 8255 38|_| PA6
_| 82C55 |_
PA0 |_|4 37|_| PA7
_| |_
--> /RD |_|5 36|_| /WR (*NOTE)
_| |_
--> /CS |_|6 35|_| RES
_| |_
--> A1 |_|8 33|_| D1
_| |_
--> A0 |_|9 32|_| D2
_| |_
PC7 |_|10 31|_| D3
_| |_
PC6 |_|11 30|_| D4
_| |_
PC5 |_|12 29|_| D5
_| |_
PC4 |_|13 28|_| D6
_| |_
PC0 |_|14 27|_| D7
_| |_
PC1 |_|15 26|_| VCC
_| |_
PC2 |_|16 25|_| PB7
_| |_
PC3 |_|17 24|_| PB6
_| |_
PB0 |_|18 23|_| PB5
_| |_
PB1 |_|19 22|_| PB4
_| |_
PB2 |_|20 21|_| PB3
|______________________|
For Z80 Use:
(*note) If you use the CMOS version (82C55) then delay the /WR signal
so it's active AFTER chipselect, you can use this:
82C55 |_ ___
PIN 36|_| ------*---|___|---- /WR from the CPU (Z80)
| | R1
| Use thise values:
--- -----------------
--- C1 CPU 4 MHz 8MHz
| C1 47p 33p
| R1 470E 330E
GND
This is something I have found out my self, after looking the timing
over for the Z80 with the 82C55, and 8255.
-------------------------------------------------------------------------------
From Paul Oh's website: http://www.cs.columbia.edu/~paul
-------------------------------------------------------------
8255 PPI IBM PC Interface Card
Visit my new company: Boondog Automation FREE 8255 PCB Artwork, Code
and Sections of the 70-page Applications Manual
Introduction
The 8255 Programmable Peripheral Interface (PPI) is a versatile and
easy to construct circuit card the plugs into an available slot in
your IBM PC. Such a card allows you to do both digital input and
output (DIO) to your PC. For example, you may want to have your PC
turn on a switch, or have a switch electronically activate your PC to
execute a program. The 8255 has 3 8-bit TTL-compatiable I/O ports.
Thus technically you could control up to 24 individual devices. For
example, with the circuit description that follows, you could build a
home security device, with a digital input detecting if someone rang
your doorbell, and having a digital output turning on a light switch,
the other remaining 22 DIOs could then be used to detect for sound
detection (broken glass say), doors being opened, digitally dial 911,
detect smoke etc. Hopefully this preamble has excited your curiosity
and imagination. This article is broken down as follows:
* Parts List with Potential Vendor Source
* Theory of Operation
* Construction
* QBasic Programming
* References For this card, Microsoft's QuickBasic will be used to
do some simple programs.
Parts List and Potential Vendor Source
Below is a parts I used for my construction. Additionally, I list
the source from which I bought it from, along with the vendor part
number and cost (in 1995). I did some shopping around, and found
these places to offer the best tradeoff between price and
single-source parts availability - hopefully this saves you time!
The first table is what is necessary to make a card. The second
table is an additionally prototyping area circuit that interfaces
with the card via a 40-pin ribbon cable. The parts in this table
also include a simple testing circuit which is described later. A
note about the Digikey parts: I did not find such a part in
Jameco. I had these lying around in my parts box. Other similar
sockets could be used. But I recommend that at least one be a
wirewrap type, since I use both soldering and wirewrapping for the
8255 Card circuit.
CAPTION: TABLE 1A: 8255 CARD PARTS LIST
PART DESCRIPTION VENDOR PART PRICE (1995) QUANTITY
8255 PPI 40 PIN IC JAMECO #52732 3.25 1
40 PIN WIREWRAP SOCKET JAMECO #41179 1.49 1
74LS138 3-TO-8 DECODER JAMECO #48397 0.35 1
16-PIN SOLDER SOCKET JAMECO #37372 0.14 1
0.1 uF CAPACITORS JAMECO #15270 1.10 FOR 10 3
40 PIN HEADER CONNECTOR DIGIKEY #CHW40G-HD 5.11 2
40 PIN SOCKET CONNECTOR DIGIKEY #CS-C40T-ND 2.45 2
2 ROW 8-POSITION JUMPER JAMECO #53575 0.55 1
SHORTING BLOCKS JAMECO #19140 0.20 2
PC BUS PROTOTYPING CARD JAMECO #21531 17.95 1
RIBBON CABLE 40 PIN JAMECO #105726 1.09 3 FT
WIRE WRAP
CAPTION: TABLE 1B: BREADBOARD INTERFACE PARTS LIST
PART DESCRIPTION VENDOR PART PRICE (1995) QUANTITY
6 IN. SOLDERLESS BREADBOARD RADIO SHACK #276-174 12.49 2
74LS04 HEX INVERTOR JAMECO #46316 0.29 1
LEDS T1-3/4 JAMECO #34745 0.19 8
220 OHM RESISTORS
TERMINAL BLOCKS JAMECO #99426 0.59 14
Theory of Operation
This section is organized as follows:
+ The Base Address
+ The Control Modes
+ The Jumper Settings
The Base Address
This PC Interface Card plugs into any available 8 or 16-bit slot
(also known as an AT-slot) on your PC's motherboard, just like a
sound card or disk drive controller card does. Your CPU (Central
Processing Unit) communicates with cards by knowing the card's
address. From IBM's Technical Reference Manuals, one can learn
that the motherboard allows for several available addresses for
any cards you wish to plug into a slot. By physically using
jumpers on the card, we can assign an address to the card. In
software, we can tell the CPU what this address is (more about
this in the Programming section).
CAPTION: TABLE 2: EXPANSION SLOT ADDRESSES
HEX ADDRESS (DEC) DESCRIPTION HEX ADDRESS (DEC) DESCRIPTION
218H-21FH (536-543) AVAILABLE 390H-39FH (906-927) AVAILABLE
250H-277H (592-631) AVAILABLE 3AAH-3AFH (938-943) AVAILABLE
280H-2EFH (640-751) AVAILABLE 3B0H-3BFH (944-959) AVAILABLE
300H-31FH (768-799) AVAILABLE 3F8H-3FFH COM1: (DON'T USE!)
For notation purposes, a number with an H next to it denotes
hexadecimal notation and plain numbers will denote denote plain
decimal. For this card, I chose to use 280H (640 Decimal) for the
address of the card. This is because many other cards tend to use
the traditional 300H. By choosing 280H the probability of address
conflict is a bit less. Thus 280H will known as the base address
of the card. Of course, you can change this, by using the table
above as a guide, and physically changing the jumper configuration
on the board, as well as in your software program.
Control Modes
The 8255 allows for three distinct operating modes (Modes 0, 1 and
2) as follows:
+ Mode 0: Ports A and B operate as either inputs or outputs and
Port C is divided into two 4-bit groups either of which can
be operated as inputs or outputs
+ Mode 1: Same as Mode 0 but Port C is used for handshaking and
control
+ Mode 2: Port A is bidirectional (both input and output) and
Port C is used for handshaking. Port B is not used.
Each port is 8-bit TTL-compatiable. As such, the 8255 can
conceivable be configured to control 24 devices (1 bit/device).
The various modes can be set by writing a special value to the
control port. The control port is Base Address + 3 (hence 640+3 =
643 Decimal). The table below shows the special values needed to
configure Ports A, B and C for either input or output:
CAPTION: TABLE 3: 8255 (CONTROL) MODE CONFIGURATION (To Base + 3)
CONTROL WORD (HEX) CONTROL WORD (DECIMAL) PORT A PORT B PORT C
80 128 OUT OUT OUT
82 130 OUT IN OUT
85 133 OUT OUT IN
87 135 OUT IN IN
88 136 IN OUT OUT
8A 138 IN IN OUT
8C 140 IN OUT IN
8F 143 IN IN IN
As mentioned the Control Port is Base Address + 3. Port A is
always at Base Address; Port B is Base Address + 1; Port C is Base
Address + 2. Thus in our example Ports A, B and C are at 640, 641
and 642 (Decimal) respectively. By writing say, 128 to the Control
port will then configure the 8255 to have all three Ports set for
output. This can be done using QuickBasic's OUT statement, for
example:
110 BaseAddress = 640
120 PortA = BaseAddress
130 ControlPort = BaseAddress + 3
140 OUT ControlPort, 128
150 OUT PortA, 1
More software coding will be described later in the Programming
Section.
Jumper Settings, the 74LS138 and IBM Expansion Bus
The 74LS138 is a 3-to-8 line decoder. It is a 16-pin IC, taking a
3-bit word on pins 1, 2 and 3. This leads to 8 possible
combinations, and explains how the jumper can be physically set to
provide for the 8 possible card address settings mentioned above.
Examining the schematic in the Construction Section along with the
explanation that follows will provide more insight on how this
physically works. If you examine any PC card that plugs into the
expansion slot on your motherboard, you can count 31 pads
(typically gold) on each side of the card.
Altogether there are 62 pads on this card. Such cards are also
known as 8-bit ISA Bus (XT-style) cards. Due to the upward
compatiability of PC systems, such cards can plug into expansion
slots on XTs, ATs, 386s, 486s and Pentiums. The following diagram
shows the pinouts of such expansion slots:
Getting back to the 74LS138... address lines A8 and A9 on the bus
drive the control inputs to the 74LS138. Additionally, AEN
(Address Enable), located at pin A11 is low when the card is
recognized by the microprocessor. When A8 and A11 are low and A9 is
high, the 74LS138 will decode bus address lines A5, A6 and A7
which are the 3-bit inputs to the 74LS138. o
|
---------------------------------------- |
74138 (Added by rstevew@armory.com) |
|
1-of-8 inverting decoder/demultiplexer. |
|
+---+-----+---+---+---+---+
| | | | | |
v v v v v v
A9 A8 A11 A5 A6 A7
+----------+ +-------------------------++-------------------+
S0 |1 +--+ 16| VCC |EN1|/EN2|/EN3| S2| S1| S0||/Y0|/Y1|/Y2|...|/Y7|
S1 |2 15| /Y0 |---+----+----+---+---+---++---+---+---+---+---|
S2 |3 14| /Y1 | 0 | X | X | X | X | X || 1 | 1 | 1 | 1 | 1 |
/EN3 |4 74 13| /Y2 | 1 | 1 | X | X | X | X || 1 | 1 | 1 | 1 | 1 |
/EN2 |5 138 12| /Y3 | 1 | 0 | 1 | X | X | X || 1 | 1 | 1 | 1 | 1 |
EN1 |6 11| /Y4 +---+----+----+---+---+---++---+---+---+---+---+
/Y7 |7 10| /Y5 | 1 | 0 | 0 | 0 | 0 | 0 || 0 | 1 | 1 | 1 | 1 |
GND |8 9| /Y6 | 1 | 0 | 0 | 0 | 0 | 1 || 1 | 0 | 1 | 1 | 1 |
+----------+ | 1 | 0 | 0 | 0 | 1 | 0 || 1 | 1 | 0 | 1 | 1 |
| 1 | 0 | 0 | . | . | . || 1 | 1 | 1 | . | 1 |
| 1 | 0 | 0 | 1 | 1 | 1 || 1 | 1 | 1 | 1 | 0 |
-Steve Walz +-------------------------++-------------------+
-----------------------------------------
As a result, we can see that the jumper provides for 8 possible
card address lines listed in the above figure. This in comparision
with TABLE 2 shows that the only available only jumper position 5
is fully available, corresponding to 280H ((640).
Card Construction
This section is organized as follows:
+ General Intro and Schematic
+Card Construction Hightlights
+Breadboard Interface Construction
--
+[snip - see Paul's Web Site]
QBasic Programming
Taking care to check all your wiring, now it is possible to
check if your circuit indeed works. Insert the 8255 card into
an empty slot in your PC's motherboard (assuming you turned
off the power first!). Make sure the card is seated properly
and the wirewrapping socket pins do not come into contact
with any other cards. Launch QBasic (I have not tried testing
under Windows) under a DOS environment. Try executing the
following code:
100 REM 8255 PPI SET PORTS A,B,C TO OUTPUT
110 BASEADDR = 640: REM 280H/JUMPER AT POSITION 5
120 PORTA = BASEADDR
130 CNTRL = BASEADDR + 3
140 OUT CNTRL, 128
150 FOR SGNAL = 0 TO 255
160 OUT PORTA, SGNAL:PRINT "DECIMAL="; SGNAL
170 FOR DELAY = 1 TO 500: NEXT DELAY
180 NEXT SGNAL
999 END
If everything has been assembled correctly and the software
properly compiled, then one should see the 8 LEDs should
"count" from 0 to 255 in a binary fashion.
Congradulations if you have gotten this far! In my experience
troubleshooting should begin in checking if the card is
seated nicely in its slot on the motherboard. Also check the
jumper. Check your wiring.
Of course the above is a simple circuit, but I leave it to
your imagination to come up with other possibilities given
that you have 24 digital inputs and outputs. Things like
motor speed control, switching on relays, reading
thermistors, strain gages etc.
References
o 8255A/8255A-5 Programmable Peripheral Interface, Intel
Order No. 231308-002
Build This Experimenter's I/O Card, Radio-Electronics, June
1990 pp. 73-78
Email me: paul@cs.columbia.edu
-------------------------------------------------------------------------------
82c55a.doc
----------------------------------------------------------------------
How to Use the 8255 Family of Parallel I/O Interface Adapters
82C55A Parallel Interface Adapter (Intel)
8255
8255A
82C55A
+--------\/--------+
1 -|pa3 pa4|- 40
2 -|pa2 pa5|- 39
3 -|pa1 pa6|- 38
4 -|pa0 pa7|- 37
5 -|/rd /wr|- 36
6 -|/cs reset|- 35
7 -|gnd d0|- 34
8 -|a1 d1|- 33
9 -|a0 d2|- 32
10 -|pc7 82C55A d3|- 31
11 -|pc6 d4|- 30
12 -|pc5 d5|- 29
13 -|pc4 d6|- 28
14 -|pc0 d7|- 27
15 -|pc1 vcc|- 26
16 -|pc2 pb7|- 25
17 -|pc3 pb6|- 24
18 -|pb0 pb5|- 23
19 -|pb1 pb4|- 22
20 -|pb2 pb3|- 21
+------------------+
8255
Programmable Peripheral Interface
Register usage
0 rw port a
1 rw port b
r bbbbbbbb read port
w bbbbbbbb write port
2 rw port c
r bbbbbbbb read port
w 0...nnn0 set bit nnn (0..7)
w 0...nnn1 reset bit nnn (0..7)
w 1...bbbb set 4 least bits according to bbbb
w .xxx.... don't care
for port c the use of the bits is as follows:
m0 m1 m2 cntl
rw xxxxxxxx - general i/o bits
w rw 1....... a output buffer full
r rw .1...... a interrupt enable1
rw r xx...... - general i/o bits
r rw ..1..... a input buffer full
r rw ...1.... a interrupt enable2
rw w ..xx.... - general i/o bits
rw rw rw ....1... a interrupt
rw .....1.. b interrupt enable
w ......1. b output buffer full
r ......1. b input buffer full
rw .......1 b interrupt
rw .....xxx - general i/o bits
3 w control
.......1 port c (b0..b3) is input/output
......1. port b is input/output
.....1.. group b mode 1/0
....1... port c (b4..b7) is input/output
...1.... port a is input/output
.00..... group a mode 0
.01..... group a mode 1
.x1..... group a mode 2
1....... mode set flag active
-------------------------------------------------------------------------------
END
Collected by Richard Steven Walz from the sources cited above:
They appear free for personal use, but their other rights apply!
So no commercial use whatsoever.
-Steve
--
-Steve Walz rstevew@armory.com ftp://ftp.armory.com:/pub/user/rstevew
-Electronics Site!! 1000 Files/50 Dirs!! http://www.armory.com/~rstevew
-Europe(Italy) http://ftp.cised.unina.it/pub/electronics/ftp.armory.com